Both governmental regulation and the expectation of the general community of users continue to make resistance to ESD (Electro-Static Discharge) induced failure a necessary, or at least desirable, property of many categories of consumer and commercial equipment. The same is true for conducted and radiated EMI (Electro-Magnetic Interference). Computers and their peripherals are such a category. A common way of characterizing such resistance to ESD and testing for regulatory compliance is to "zap" the equipment with a device that simulates an ESD event. (The sound of the word "zap" is thought to suggest the sound of arcing, or of a spark.) For example, a standard value of capacitance may be charged to a selectable value of high voltage (say, from one to twenty thousand volts) and then discharged through a standard fixed amount of resistance when in contact with arbitrary locations on the DUT (Device Under Test). Generally speaking, surviving encounters with a zapper charged to higher voltages require more extensive protection in the DUT, and is more difficult to provide than that needed for zaps of lower voltage.
It is common for peripherals and their controllers (usually a computer) to have I/O (Input/Output) circuit boards that act as interfaces between a transmission medium, such as twisted pair, coaxial cable or a fibre optic cable. The transmission medium attaches to the I/O card with a suitable connector. The I/O card itself is generally removable once a metallic I/O slot cover, or interface plate, is itself removed. The connector for the transmission medium interconnects the I/O card to the transmission medium through an aperture in the metallic I/O slot cover (interface plate). A favorite place to zap the equipment is in the vicinity of such apertures. The resulting failures can range from the genuine physical damage of destroyed semiconductor junctions and overcooked resistances to mere temporary errors in operation caused by transitory disturbances to data and control signals.
The image that most often comes to mind when considering damage from ESD is what happens when someplace other than a "good solid ground" is zapped, say a signal pin of an IC (integrated circuit) as compared to an enclosing chassis that is itself connected to an earth safety ground. An enclosing metallic chassis is often compared to a Farady cage, or an electrostatic shield, which if well constructed, it is. Many voltage sensitive techniques have been developed to deal with zapping individual pins of an IC. It is recognized that in either case the peak currents involved can be substantial, even if brief; say, in the range of several amperes. Under the right circumstances, those high currents can cause trouble with zaps applied in the vicinity of necessary apertures in a real world chassis that is expected to play the role of a Farady cage.
Consider the case where an I/O connector transits an enclosing chassis through an aperture. The part of the chassis of interest here is frequently formed from a metallic interface plate. The aperture is in the interface plate. Inside the chassis the connector makes signal connections to the I/O card, and outside the chassis the connector serves as an anchor and strain relief for the cable that is the transmission medium. The connector may have a shell, but owing to issues relating to mechanical tolerances, among other things, it is common for the shell not to be anchored to the chassis or to the interface plate, but to the I/O card itself This is all the more likely when the transmission medium is fibre optic cables, and all the mating connector shells and boots, etc., are formed of plastic. Arcing from the interface plate to these plastic parts during a zap, it turns out, is not a troubling problem that needs to be solved. And even if such were thought likely, there are well known techniques for protecting the circuitry on the I/O card; e.g., guard rings, zener diodes and voltage triggered SCR's, etc.
All of that said, we discovered that a fibre optic connection as described was indeed susceptible to ESD induced failures. It was discovered that the aperture can act as an antenna effective at frequencies that are significant components of the current impulse produced by the zap. Radiating RF energy from that antenna (radiated EMI) couples into the circuitry of the I/O card. (In our case it seems to have a special fondness for the photo-diodes in the fibre optic transceiver, although it seems clear that, depending upon geometry, any component could be a receiving antenna.) This spurious energy loosed upon the I/O card causes it to fault in generally unpredictable ways, similar to what might be expected if there were severe trash on the power supply. What to do?